https://wiki.hh.se/ceres/index.php?action=history&feed=atom&title=Publications%3AVDSL2_Multi-Processor_System-on-Chip_DesignPublications:VDSL2 Multi-Processor System-on-Chip Design - Revision history2026-05-22T23:34:00ZRevision history for this page on the wikiMediaWiki 1.22.6https://wiki.hh.se/ceres/index.php?title=Publications:VDSL2_Multi-Processor_System-on-Chip_Design&diff=4216&oldid=prevSlawek: Created page with "<div style='display: none'> == Do not edit this section == </div> {{PublicationSetupTemplate|Author=Tomas Nordström, Göran Ökvist, Mikael Isaksson |PID=552725 |Name=Nordstr..."2014-06-26T03:44:22Z<p>Created page with "<div style='display: none'> == Do not edit this section == </div> {{PublicationSetupTemplate|Author=Tomas Nordström, Göran Ökvist, Mikael Isaksson |PID=552725 |Name=Nordstr..."</p>
<p><b>New page</b></p><div><div style='display: none'><br />
== Do not edit this section ==<br />
</div><br />
{{PublicationSetupTemplate|Author=Tomas Nordström, Göran Ökvist, Mikael Isaksson<br />
|PID=552725<br />
|Name=Nordström, Tomas [tomnor] (Högskolan i Halmstad [2804], Sektionen för Informationsvetenskap, Data– och Elektroteknik (IDE) [3905], Halmstad Embedded and Intelligent Systems Research (EIS) [3938], Centrum för forskning om inbyggda system (CERES) [6702]);Ökvist, Göran (UpZide Technologies AB);Isaksson, Mikael (UpZide Technologies AB)<br />
|Title=VDSL2 Multi-Processor System-on-Chip Design<br />
|PublicationType=Conference Paper<br />
|ContentType=Refereegranskat<br />
|Language=eng<br />
|Journal=<br />
|JournalISSN=<br />
|Status=<br />
|Volume=<br />
|Issue=<br />
|HostPublication=<br />
|Conference=Extended abstract for Second Swedish Workshop on Multi-Core Computing MCC09, Uppsala, Sweden, Nov. 26-27<br />
|StartPage=<br />
|EndPage=<br />
|Year=2009<br />
|Edition=<br />
|Pages=<br />
|City=<br />
|Publisher=<br />
|Series=<br />
|SeriesISSN=<br />
|ISBN=<br />
|Urls=<br />
|ISRN=<br />
|DOI=<br />
|ISI=<br />
|PMID=<br />
|ScopusId=<br />
|NBN=urn:nbn:se:hh:diva-19629<br />
|LocalId=<br />
|ArchiveNumber=<br />
|Keywords=<br />
|Categories=Inbäddad systemteknik (20207)<br />
|ResearchSubjects=<br />
|Projects=<br />
|Notes=<br />
|Abstract=<p>This paper reports on the experience from a heterogeneous multi-core design for Very high-rate Digital SubscriberLine version 2 (VDSL2) modems. Between 2006 and 2008 a ten person team designed a 42 core systemon-chip, which included seven unique processor-core designs. We describe the used design tools and our designmethodology based on utilizing multiple extendable processor cores. Our experience from designing such a demandingsignal processing application, using the suggested design methodology, proved that even a small designteam rapidly can design a very competitive and yet flexible system-on-chip design solution.</p><br />
|Opponents=<br />
|Supervisors=<br />
|Examiners=<br />
|Patent=<br />
|ThesisLevel=<br />
|Credits=<br />
|Programme=<br />
|Subject=<br />
|Uppsok=<br />
|DefencePlace=<br />
|DefenceLanguage=<br />
|DefenceDate=<br />
|CreatedDate=2012-09-15<br />
|PublicationDate=2012-09-15<br />
|LastUpdated=2013-02-26<br />
|diva=http://hh.diva-portal.org/smash/record.jsf?searchId=1&pid=diva2:552725}}<br />
<div style='display: none'><br />
<br />
== Keep all hand-made modifications below ==<br />
</div>{{PublicationDisplayTemplate}}</div>Slawek