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		<id>https://wiki.hh.se/ceres/index.php?action=history&amp;feed=atom&amp;title=Zain%27s_Publications</id>
		<title>Zain's Publications - Revision history</title>
		<link rel="self" type="application/atom+xml" href="https://wiki.hh.se/ceres/index.php?action=history&amp;feed=atom&amp;title=Zain%27s_Publications"/>
		<link rel="alternate" type="text/html" href="https://wiki.hh.se/ceres/index.php?title=Zain%27s_Publications&amp;action=history"/>
		<updated>2026-04-04T03:37:18Z</updated>
		<subtitle>Revision history for this page on the wiki</subtitle>
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	<entry>
		<id>https://wiki.hh.se/ceres/index.php?title=Zain%27s_Publications&amp;diff=6731&amp;oldid=prev</id>
		<title>Ceres at 12:35, 22 September 2017</title>
		<link rel="alternate" type="text/html" href="https://wiki.hh.se/ceres/index.php?title=Zain%27s_Publications&amp;diff=6731&amp;oldid=prev"/>
				<updated>2017-09-22T12:35:16Z</updated>
		
		<summary type="html">&lt;p&gt;&lt;/p&gt;
&lt;table class='diff diff-contentalign-left'&gt;
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				&lt;tr style='vertical-align: top;'&gt;
				&lt;td colspan='2' style=&quot;background-color: white; color:black; text-align: center;&quot;&gt;← Older revision&lt;/td&gt;
				&lt;td colspan='2' style=&quot;background-color: white; color:black; text-align: center;&quot;&gt;Revision as of 12:35, 22 September 2017&lt;/td&gt;
				&lt;/tr&gt;&lt;tr&gt;&lt;td colspan=&quot;2&quot; class=&quot;diff-lineno&quot;&gt;Line 12:&lt;/td&gt;
&lt;td colspan=&quot;2&quot; class=&quot;diff-lineno&quot;&gt;Line 12:&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;== Conference and Workshop Papers ==&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;== Conference and Workshop Papers ==&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td colspan=&quot;2&quot;&gt;&amp;#160;&lt;/td&gt;&lt;td class='diff-marker'&gt;+&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&lt;ins style=&quot;font-weight: bold; text-decoration: none;&quot;&gt;#Essayas Gebrewahid and Zain Ul-Abdin, “Actor Fission Transformations for Executing Dataflow Programs on Manycores”, in Proceedings of the Forum on specification &amp;amp; Design Languages (FDL), Verona, Italy, September 18-20, 2017. &lt;/ins&gt;&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;#Süleyman Savas, Erik Hertz, Tomas Nordström, Zain Ul-Abdin, &amp;quot;Efficient Single-Precision Floating-Point Division Using Harmonized Parabolic Synthesis&amp;quot;, in Proceedings of the IEEE Computer Society Annual Symposium on VLSI (ISVLSI), Bochum, Germany, 3-5 July, 2017.&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;#Süleyman Savas, Erik Hertz, Tomas Nordström, Zain Ul-Abdin, &amp;quot;Efficient Single-Precision Floating-Point Division Using Harmonized Parabolic Synthesis&amp;quot;, in Proceedings of the IEEE Computer Society Annual Symposium on VLSI (ISVLSI), Bochum, Germany, 3-5 July, 2017.&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;# Sebastian Raase, Süleyman Savas, Zain Ul-Abdin and Tomas Nordstrom, “Supporting efficient channel-based communication in a mesh network-on-chip”, Ninth Nordic Workshop on Multi-Core Computing (MCC2016), Trondheim, Norway, 29-30 November, 2016.&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;# Sebastian Raase, Süleyman Savas, Zain Ul-Abdin and Tomas Nordstrom, “Supporting efficient channel-based communication in a mesh network-on-chip”, Ninth Nordic Workshop on Multi-Core Computing (MCC2016), Trondheim, Norway, 29-30 November, 2016.&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;/table&gt;</summary>
		<author><name>Ceres</name></author>	</entry>

	<entry>
		<id>https://wiki.hh.se/ceres/index.php?title=Zain%27s_Publications&amp;diff=6730&amp;oldid=prev</id>
		<title>Ceres at 12:13, 20 September 2017</title>
		<link rel="alternate" type="text/html" href="https://wiki.hh.se/ceres/index.php?title=Zain%27s_Publications&amp;diff=6730&amp;oldid=prev"/>
				<updated>2017-09-20T12:13:47Z</updated>
		
		<summary type="html">&lt;p&gt;&lt;/p&gt;
&lt;table class='diff diff-contentalign-left'&gt;
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				&lt;tr style='vertical-align: top;'&gt;
				&lt;td colspan='2' style=&quot;background-color: white; color:black; text-align: center;&quot;&gt;← Older revision&lt;/td&gt;
				&lt;td colspan='2' style=&quot;background-color: white; color:black; text-align: center;&quot;&gt;Revision as of 12:13, 20 September 2017&lt;/td&gt;
				&lt;/tr&gt;&lt;tr&gt;&lt;td colspan=&quot;2&quot; class=&quot;diff-lineno&quot;&gt;Line 12:&lt;/td&gt;
&lt;td colspan=&quot;2&quot; class=&quot;diff-lineno&quot;&gt;Line 12:&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;== Conference and Workshop Papers ==&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;== Conference and Workshop Papers ==&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td colspan=&quot;2&quot;&gt;&amp;#160;&lt;/td&gt;&lt;td class='diff-marker'&gt;+&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&lt;ins style=&quot;font-weight: bold; text-decoration: none;&quot;&gt;#Süleyman Savas, Erik Hertz, Tomas Nordström, Zain Ul-Abdin, &amp;quot;Efficient Single-Precision Floating-Point Division Using Harmonized Parabolic Synthesis&amp;quot;, in Proceedings of the IEEE Computer Society Annual Symposium on VLSI (ISVLSI), Bochum, Germany, 3-5 July, 2017.&lt;/ins&gt;&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;# Sebastian Raase, Süleyman Savas, Zain Ul-Abdin and Tomas Nordstrom, “Supporting efficient channel-based communication in a mesh network-on-chip”, Ninth Nordic Workshop on Multi-Core Computing (MCC2016), Trondheim, Norway, 29-30 November, 2016.&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;# Sebastian Raase, Süleyman Savas, Zain Ul-Abdin and Tomas Nordstrom, “Supporting efficient channel-based communication in a mesh network-on-chip”, Ninth Nordic Workshop on Multi-Core Computing (MCC2016), Trondheim, Norway, 29-30 November, 2016.&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;# Suuleyman Savas, Sebastian Raase, Essayas Gebrewahid, Zain Ul-Abdin, Tomas Nordström, “Dataflow Implementation of QR Decomposition on a Manycore”, in Proceedings of the Third ACM International Workshop on Many-core Embedded Systems, June 2016.&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;# Suuleyman Savas, Sebastian Raase, Essayas Gebrewahid, Zain Ul-Abdin, Tomas Nordström, “Dataflow Implementation of QR Decomposition on a Manycore”, in Proceedings of the Third ACM International Workshop on Many-core Embedded Systems, June 2016.&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;/table&gt;</summary>
		<author><name>Ceres</name></author>	</entry>

	<entry>
		<id>https://wiki.hh.se/ceres/index.php?title=Zain%27s_Publications&amp;diff=6674&amp;oldid=prev</id>
		<title>Ceres at 12:21, 9 May 2017</title>
		<link rel="alternate" type="text/html" href="https://wiki.hh.se/ceres/index.php?title=Zain%27s_Publications&amp;diff=6674&amp;oldid=prev"/>
				<updated>2017-05-09T12:21:37Z</updated>
		
		<summary type="html">&lt;p&gt;&lt;/p&gt;
&lt;table class='diff diff-contentalign-left'&gt;
				&lt;col class='diff-marker' /&gt;
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				&lt;td colspan='2' style=&quot;background-color: white; color:black; text-align: center;&quot;&gt;← Older revision&lt;/td&gt;
				&lt;td colspan='2' style=&quot;background-color: white; color:black; text-align: center;&quot;&gt;Revision as of 12:21, 9 May 2017&lt;/td&gt;
				&lt;/tr&gt;&lt;tr&gt;&lt;td colspan=&quot;2&quot; class=&quot;diff-lineno&quot;&gt;Line 4:&lt;/td&gt;
&lt;td colspan=&quot;2&quot; class=&quot;diff-lineno&quot;&gt;Line 4:&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;== Journal Articles ==&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;== Journal Articles ==&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;−&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;# Zain Ul-Abdin and Mingkun Yang, [http://link.springer.com/article/10.1007/s11265-015-1078-1 “A Radar Signal Processing Case Study for Dataflow Programming of Manycores”], Journal of Signal Processing, Vol. 87(1) April 2017, pp. 49-62. &lt;del class=&quot;diffchange diffchange-inline&quot;&gt;http://dx.doi.org/10.1007/s11265-015-1078-1&lt;/del&gt;&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;+&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;# Zain Ul-Abdin and Mingkun Yang, [http://link.springer.com/article/10.1007/s11265-015-1078-1 “A Radar Signal Processing Case Study for Dataflow Programming of Manycores”], Journal of Signal Processing, Vol. 87(1) April 2017, pp. 49-62. &amp;#160;&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;# Zain Ul-Abdin and Bertil Svensson, [http://dl.acm.org/citation.cfm?id=2843946 “A Retargetable Compilation Framework for Heterogeneous Reconfigurable Computing”], ACM Transactions on Reconfigurable Technology and Systems, Vol. 9(4), September 2016.&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;# Zain Ul-Abdin and Bertil Svensson, [http://dl.acm.org/citation.cfm?id=2843946 “A Retargetable Compilation Framework for Heterogeneous Reconfigurable Computing”], ACM Transactions on Reconfigurable Technology and Systems, Vol. 9(4), September 2016.&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;# Zain-ul-Abdin and Bertil Svensson, [http://dl.acm.org/citation.cfm?id=2213803 “Occam-pi for Programming of Massively Parallel Reconfigurable Architectures”], International Journal of Reconfigurable Computing, Vol. 2012, Article ID 504815, 2012.&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;# Zain-ul-Abdin and Bertil Svensson, [http://dl.acm.org/citation.cfm?id=2213803 “Occam-pi for Programming of Massively Parallel Reconfigurable Architectures”], International Journal of Reconfigurable Computing, Vol. 2012, Article ID 504815, 2012.&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;/table&gt;</summary>
		<author><name>Ceres</name></author>	</entry>

	<entry>
		<id>https://wiki.hh.se/ceres/index.php?title=Zain%27s_Publications&amp;diff=6673&amp;oldid=prev</id>
		<title>Ceres at 12:21, 9 May 2017</title>
		<link rel="alternate" type="text/html" href="https://wiki.hh.se/ceres/index.php?title=Zain%27s_Publications&amp;diff=6673&amp;oldid=prev"/>
				<updated>2017-05-09T12:21:11Z</updated>
		
		<summary type="html">&lt;p&gt;&lt;/p&gt;
&lt;table class='diff diff-contentalign-left'&gt;
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				&lt;td colspan='2' style=&quot;background-color: white; color:black; text-align: center;&quot;&gt;← Older revision&lt;/td&gt;
				&lt;td colspan='2' style=&quot;background-color: white; color:black; text-align: center;&quot;&gt;Revision as of 12:21, 9 May 2017&lt;/td&gt;
				&lt;/tr&gt;&lt;tr&gt;&lt;td colspan=&quot;2&quot; class=&quot;diff-lineno&quot;&gt;Line 4:&lt;/td&gt;
&lt;td colspan=&quot;2&quot; class=&quot;diff-lineno&quot;&gt;Line 4:&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;== Journal Articles ==&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;== Journal Articles ==&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;−&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;# Zain Ul-Abdin and Mingkun Yang, “A Radar Signal Processing Case Study for Dataflow Programming of Manycores”, Journal of Signal Processing, Vol. 87(1) April 2017, pp. 49-62. http://dx.doi.org/10.1007/s11265-015-1078-1&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;+&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;# Zain Ul-Abdin and Mingkun Yang, &lt;ins class=&quot;diffchange diffchange-inline&quot;&gt;[http://link.springer.com/article/10.1007/s11265-015-1078-1 &lt;/ins&gt;“A Radar Signal Processing Case Study for Dataflow Programming of Manycores”&lt;ins class=&quot;diffchange diffchange-inline&quot;&gt;]&lt;/ins&gt;, Journal of Signal Processing, Vol. 87(1) April 2017, pp. 49-62. http://dx.doi.org/10.1007/s11265-015-1078-1&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;−&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;# Zain Ul-Abdin and Bertil Svensson, “A Retargetable Compilation Framework for Heterogeneous Reconfigurable Computing”, ACM Transactions on Reconfigurable Technology and Systems, Vol. 9(4), September 2016.&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;+&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;# Zain Ul-Abdin and Bertil Svensson, &lt;ins class=&quot;diffchange diffchange-inline&quot;&gt;[http://dl.acm.org/citation.cfm?id=2843946 &lt;/ins&gt;“A Retargetable Compilation Framework for Heterogeneous Reconfigurable Computing”&lt;ins class=&quot;diffchange diffchange-inline&quot;&gt;]&lt;/ins&gt;, ACM Transactions on Reconfigurable Technology and Systems, Vol. 9(4), September 2016.&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;−&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;# Zain-ul-Abdin and Bertil Svensson, “Occam-pi for Programming of Massively Parallel Reconfigurable Architectures”, International Journal of Reconfigurable Computing, Vol. 2012, Article ID 504815, 2012.&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;+&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;# Zain-ul-Abdin and Bertil Svensson, &lt;ins class=&quot;diffchange diffchange-inline&quot;&gt;[http://dl.acm.org/citation.cfm?id=2213803 &lt;/ins&gt;“Occam-pi for Programming of Massively Parallel Reconfigurable Architectures”&lt;ins class=&quot;diffchange diffchange-inline&quot;&gt;]&lt;/ins&gt;, International Journal of Reconfigurable Computing, Vol. 2012, Article ID 504815, 2012.&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;# Zain-ul-Abdin and Bertil Svensson, [http://www.sciencedirect.com/science/article/pii/S0141933108001038 “Evolution in Architectures and Programming Methodologies of Coarse-Grained Reconfigurable Computing”], Microprocessors and Microsystems, Vol. 33(3), 2009, pp. 161-178.&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;# Zain-ul-Abdin and Bertil Svensson, [http://www.sciencedirect.com/science/article/pii/S0141933108001038 “Evolution in Architectures and Programming Methodologies of Coarse-Grained Reconfigurable Computing”], Microprocessors and Microsystems, Vol. 33(3), 2009, pp. 161-178.&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;# Zain-ul-Abdin, Rehan Ahmad, and Habibullah Jamal, “In Circuit Emulator for 8031 Microcontroller”, Technical Journal of the University of Engineering and Technology, Taxila, Pakistan, 2001, pp. 1-8.&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;# Zain-ul-Abdin, Rehan Ahmad, and Habibullah Jamal, “In Circuit Emulator for 8031 Microcontroller”, Technical Journal of the University of Engineering and Technology, Taxila, Pakistan, 2001, pp. 1-8.&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;/table&gt;</summary>
		<author><name>Ceres</name></author>	</entry>

	<entry>
		<id>https://wiki.hh.se/ceres/index.php?title=Zain%27s_Publications&amp;diff=6672&amp;oldid=prev</id>
		<title>Ceres at 12:19, 9 May 2017</title>
		<link rel="alternate" type="text/html" href="https://wiki.hh.se/ceres/index.php?title=Zain%27s_Publications&amp;diff=6672&amp;oldid=prev"/>
				<updated>2017-05-09T12:19:04Z</updated>
		
		<summary type="html">&lt;p&gt;&lt;/p&gt;
&lt;table class='diff diff-contentalign-left'&gt;
				&lt;col class='diff-marker' /&gt;
				&lt;col class='diff-content' /&gt;
				&lt;col class='diff-marker' /&gt;
				&lt;col class='diff-content' /&gt;
				&lt;tr style='vertical-align: top;'&gt;
				&lt;td colspan='2' style=&quot;background-color: white; color:black; text-align: center;&quot;&gt;← Older revision&lt;/td&gt;
				&lt;td colspan='2' style=&quot;background-color: white; color:black; text-align: center;&quot;&gt;Revision as of 12:19, 9 May 2017&lt;/td&gt;
				&lt;/tr&gt;&lt;tr&gt;&lt;td colspan=&quot;2&quot; class=&quot;diff-lineno&quot;&gt;Line 7:&lt;/td&gt;
&lt;td colspan=&quot;2&quot; class=&quot;diff-lineno&quot;&gt;Line 7:&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;# Zain Ul-Abdin and Bertil Svensson, “A Retargetable Compilation Framework for Heterogeneous Reconfigurable Computing”, ACM Transactions on Reconfigurable Technology and Systems, Vol. 9(4), September 2016.&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;# Zain Ul-Abdin and Bertil Svensson, “A Retargetable Compilation Framework for Heterogeneous Reconfigurable Computing”, ACM Transactions on Reconfigurable Technology and Systems, Vol. 9(4), September 2016.&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;# Zain-ul-Abdin and Bertil Svensson, “Occam-pi for Programming of Massively Parallel Reconfigurable Architectures”, International Journal of Reconfigurable Computing, Vol. 2012, Article ID 504815, 2012.&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;# Zain-ul-Abdin and Bertil Svensson, “Occam-pi for Programming of Massively Parallel Reconfigurable Architectures”, International Journal of Reconfigurable Computing, Vol. 2012, Article ID 504815, 2012.&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;−&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;# Zain-ul-Abdin and Bertil Svensson, “Evolution in Architectures and Programming Methodologies of Coarse-Grained Reconfigurable Computing”, Microprocessors and Microsystems, Vol. 33(3), 2009, pp. 161-178.&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;+&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;# Zain-ul-Abdin and Bertil Svensson, &lt;ins class=&quot;diffchange diffchange-inline&quot;&gt;[http://www.sciencedirect.com/science/article/pii/S0141933108001038 &lt;/ins&gt;“Evolution in Architectures and Programming Methodologies of Coarse-Grained Reconfigurable Computing”&lt;ins class=&quot;diffchange diffchange-inline&quot;&gt;]&lt;/ins&gt;, Microprocessors and Microsystems, Vol. 33(3), 2009, pp. 161-178.&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;# Zain-ul-Abdin, Rehan Ahmad, and Habibullah Jamal, “In Circuit Emulator for 8031 Microcontroller”, Technical Journal of the University of Engineering and Technology, Taxila, Pakistan, 2001, pp. 1-8.&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;# Zain-ul-Abdin, Rehan Ahmad, and Habibullah Jamal, “In Circuit Emulator for 8031 Microcontroller”, Technical Journal of the University of Engineering and Technology, Taxila, Pakistan, 2001, pp. 1-8.&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;/table&gt;</summary>
		<author><name>Ceres</name></author>	</entry>

	<entry>
		<id>https://wiki.hh.se/ceres/index.php?title=Zain%27s_Publications&amp;diff=6671&amp;oldid=prev</id>
		<title>Ceres at 12:15, 9 May 2017</title>
		<link rel="alternate" type="text/html" href="https://wiki.hh.se/ceres/index.php?title=Zain%27s_Publications&amp;diff=6671&amp;oldid=prev"/>
				<updated>2017-05-09T12:15:03Z</updated>
		
		<summary type="html">&lt;p&gt;&lt;/p&gt;
&lt;table class='diff diff-contentalign-left'&gt;
				&lt;col class='diff-marker' /&gt;
				&lt;col class='diff-content' /&gt;
				&lt;col class='diff-marker' /&gt;
				&lt;col class='diff-content' /&gt;
				&lt;tr style='vertical-align: top;'&gt;
				&lt;td colspan='2' style=&quot;background-color: white; color:black; text-align: center;&quot;&gt;← Older revision&lt;/td&gt;
				&lt;td colspan='2' style=&quot;background-color: white; color:black; text-align: center;&quot;&gt;Revision as of 12:15, 9 May 2017&lt;/td&gt;
				&lt;/tr&gt;&lt;tr&gt;&lt;td colspan=&quot;2&quot; class=&quot;diff-lineno&quot;&gt;Line 25:&lt;/td&gt;
&lt;td colspan=&quot;2&quot; class=&quot;diff-lineno&quot;&gt;Line 25:&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;# Zain-ul-Abdin, Anders Åhlander, and Bertil Svensson, “Real-time Radar Signal Processing on Massively Parallel Processor Arrays.” in Proceedings of 47th Asilomar Conference on Signals, Systems, and Computers, CA, USA, November 2013.&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;# Zain-ul-Abdin, Anders Åhlander, and Bertil Svensson, “Real-time Radar Signal Processing on Massively Parallel Processor Arrays.” in Proceedings of 47th Asilomar Conference on Signals, Systems, and Computers, CA, USA, November 2013.&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;# Zain-ul-Abdin, Anders Åhlander, and Bertil Svensson, “Energy Efficient Synthetic- Aperture Radar Processing on a Manycore Architecture”, in Proceedings of 42nd International Conference on Parallel Processing (ICPP), Lyon, France, October 2013.&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;# Zain-ul-Abdin, Anders Åhlander, and Bertil Svensson, “Energy Efficient Synthetic- Aperture Radar Processing on a Manycore Architecture”, in Proceedings of 42nd International Conference on Parallel Processing (ICPP), Lyon, France, October 2013.&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td colspan=&quot;2&quot;&gt;&amp;#160;&lt;/td&gt;&lt;td class='diff-marker'&gt;+&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&lt;ins style=&quot;font-weight: bold; text-decoration: none;&quot;&gt;# Essayas Gebrewahid, Zain-ul-Abdin, Bertil Svensson, Veronica Gaspes, Bruno Jego, Bruno Lavigueur, and Mathieu Robart, “Programming Real-time Image Processing for Manycores in a High-level Language”, in Proceedings of International Conference on Advanced Parallel Processing Technology (APPT), August, 2013.&lt;/ins&gt;&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;# Zain-ul-Abdin and Bertil Svensson, “An Evaluation of High-Performance Embedded Processing on MPPAs”, Proceedings of the 21st IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM’13), April 2013.&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;# Zain-ul-Abdin and Bertil Svensson, “An Evaluation of High-Performance Embedded Processing on MPPAs”, Proceedings of the 21st IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM’13), April 2013.&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;# Ashraful Alam, Zain-ul-Abdin, and Bertil Svensson, “Parallelization of the Estimation Algorithm of the 3D Structure Tensor”, Proceedings of International Conference on Reconfigurable Computing and FPGAs (ReConFig’12), December 2012.&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;# Ashraful Alam, Zain-ul-Abdin, and Bertil Svensson, “Parallelization of the Estimation Algorithm of the 3D Structure Tensor”, Proceedings of International Conference on Reconfigurable Computing and FPGAs (ReConFig’12), December 2012.&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;/table&gt;</summary>
		<author><name>Ceres</name></author>	</entry>

	<entry>
		<id>https://wiki.hh.se/ceres/index.php?title=Zain%27s_Publications&amp;diff=6665&amp;oldid=prev</id>
		<title>Ceres at 12:00, 9 May 2017</title>
		<link rel="alternate" type="text/html" href="https://wiki.hh.se/ceres/index.php?title=Zain%27s_Publications&amp;diff=6665&amp;oldid=prev"/>
				<updated>2017-05-09T12:00:17Z</updated>
		
		<summary type="html">&lt;p&gt;&lt;/p&gt;
&lt;table class='diff diff-contentalign-left'&gt;
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				&lt;col class='diff-content' /&gt;
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				&lt;tr style='vertical-align: top;'&gt;
				&lt;td colspan='2' style=&quot;background-color: white; color:black; text-align: center;&quot;&gt;← Older revision&lt;/td&gt;
				&lt;td colspan='2' style=&quot;background-color: white; color:black; text-align: center;&quot;&gt;Revision as of 12:00, 9 May 2017&lt;/td&gt;
				&lt;/tr&gt;&lt;tr&gt;&lt;td colspan=&quot;2&quot; class=&quot;diff-lineno&quot;&gt;Line 28:&lt;/td&gt;
&lt;td colspan=&quot;2&quot; class=&quot;diff-lineno&quot;&gt;Line 28:&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;# Ashraful Alam, Zain-ul-Abdin, and Bertil Svensson, “Parallelization of the Estimation Algorithm of the 3D Structure Tensor”, Proceedings of International Conference on Reconfigurable Computing and FPGAs (ReConFig’12), December 2012.&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;# Ashraful Alam, Zain-ul-Abdin, and Bertil Svensson, “Parallelization of the Estimation Algorithm of the 3D Structure Tensor”, Proceedings of International Conference on Reconfigurable Computing and FPGAs (ReConFig’12), December 2012.&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;# Zain-ul-Abdin and Bertil Svensson, “Synthetic-Aperture Radar Processing on a Manycore Architecture”, 5th Swedish Workshop on Multi-Core Computing (MCC’12), November 2012.&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;# Zain-ul-Abdin and Bertil Svensson, “Synthetic-Aperture Radar Processing on a Manycore Architecture”, 5th Swedish Workshop on Multi-Core Computing (MCC’12), November 2012.&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;−&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;# Zain-ul-Abdin, Essayas Gebrewahid, and Bertil Svensson, “Managing Dynamic Reconfiguration for Fault-tolerance on a Manycore Architecture”, Proceedings of 19th International Reconfigurable Architectures Workshop (RAW’12) in conjunction&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;+&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;# Zain-ul-Abdin, Essayas Gebrewahid, and Bertil Svensson, “Managing Dynamic Reconfiguration for Fault-tolerance on a Manycore Architecture”, Proceedings of 19th International Reconfigurable Architectures Workshop (RAW’12) in conjunction with International Parallel and Distributed Processing Symposium (IPDPS’12), May 2012.&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;−&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;with International Parallel and Distributed Processing Symposium (IPDPS’12), May 2012.&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;+&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;# Zain-ul-Abdin, Anders Åhlander, and Bertil Svensson, “Programming Real-time Autofocus on a Massively Parallel Reconfigurable Architecture using Occam-pi”, in Proceedings of the 19th Annual IEEE International Symposium on Field- Programmable Custom Computing Machines (FCCM’11), May 2011.&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;# Zain-ul-Abdin, Anders Åhlander, and Bertil Svensson, “Programming Real-time Autofocus on a Massively Parallel Reconfigurable Architecture using Occam-pi”, in Proceedings of the 19th Annual IEEE International Symposium on Field- Programmable Custom Computing Machines (FCCM’11), May 2011.&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;# Zain-ul-Abdin and Bertil Svensson, “Occam-pi as a High-level language for Coarse- Grained Reconfigurable Architectures”, in Proceedings of 18th International Reconfigurable Architectures Workshop (RAW’11) in conjunction with International Parallel and Distributed Processing Symposium (IPDPS’11), May 2011. &amp;#160;&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;# Zain-ul-Abdin and Bertil Svensson, “Occam-pi as a High-level language for Coarse- Grained Reconfigurable Architectures”, in Proceedings of 18th International Reconfigurable Architectures Workshop (RAW’11) in conjunction with International Parallel and Distributed Processing Symposium (IPDPS’11), May 2011. &amp;#160;&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;/table&gt;</summary>
		<author><name>Ceres</name></author>	</entry>

	<entry>
		<id>https://wiki.hh.se/ceres/index.php?title=Zain%27s_Publications&amp;diff=6664&amp;oldid=prev</id>
		<title>Ceres at 11:59, 9 May 2017</title>
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				<updated>2017-05-09T11:59:45Z</updated>
		
		<summary type="html">&lt;p&gt;&lt;/p&gt;
&lt;table class='diff diff-contentalign-left'&gt;
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				&lt;td colspan='2' style=&quot;background-color: white; color:black; text-align: center;&quot;&gt;← Older revision&lt;/td&gt;
				&lt;td colspan='2' style=&quot;background-color: white; color:black; text-align: center;&quot;&gt;Revision as of 11:59, 9 May 2017&lt;/td&gt;
				&lt;/tr&gt;&lt;tr&gt;&lt;td colspan=&quot;2&quot; class=&quot;diff-lineno&quot;&gt;Line 23:&lt;/td&gt;
&lt;td colspan=&quot;2&quot; class=&quot;diff-lineno&quot;&gt;Line 23:&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;# Suleyman Savas, Essayas Gebrewahid, Zain Ul-Abdin, Tomas Nordstrom, Mingkun Yang, “An evaluation of code generation of dataflow languages on manycore architectures”, in Proceedings of the 20th International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA), Chongqing, China, August 20-22, 2014.&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;# Suleyman Savas, Essayas Gebrewahid, Zain Ul-Abdin, Tomas Nordstrom, Mingkun Yang, “An evaluation of code generation of dataflow languages on manycore architectures”, in Proceedings of the 20th International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA), Chongqing, China, August 20-22, 2014.&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;# Mingkun Yang, Süleyman Savas, Zain Ul-Abdin, and Tomas Nordström, “A Communication Library for Mapping Dataflow Applications on Manycore Architectures”, 6th Swedish Workshop on Multi-Core Computing (MCC’13), November 2013.&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;# Mingkun Yang, Süleyman Savas, Zain Ul-Abdin, and Tomas Nordström, “A Communication Library for Mapping Dataflow Applications on Manycore Architectures”, 6th Swedish Workshop on Multi-Core Computing (MCC’13), November 2013.&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;−&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&lt;del class=&quot;diffchange diffchange-inline&quot;&gt;[19] &lt;/del&gt;Zain-ul-Abdin, Anders Åhlander, and Bertil Svensson, “Real-time Radar Signal&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;+&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&lt;ins class=&quot;diffchange diffchange-inline&quot;&gt;# &lt;/ins&gt;Zain-ul-Abdin, Anders Åhlander, and Bertil Svensson, “Real-time Radar Signal Processing on Massively Parallel Processor Arrays.” in Proceedings of 47th Asilomar Conference on Signals, Systems, and Computers, CA, USA, November 2013.&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;−&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;Processing on Massively Parallel Processor Arrays.” in Proceedings of 47th Asilomar&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;+&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&lt;ins class=&quot;diffchange diffchange-inline&quot;&gt;# &lt;/ins&gt;Zain-ul-Abdin, Anders Åhlander, and Bertil Svensson, “Energy Efficient Synthetic- Aperture Radar Processing on a Manycore Architecture”, in Proceedings of 42nd International Conference on Parallel Processing (ICPP), Lyon, France, October 2013.&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;−&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;Conference on Signals, Systems, and Computers, CA, USA, November 2013.&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;+&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&lt;ins class=&quot;diffchange diffchange-inline&quot;&gt;# &lt;/ins&gt;Zain-ul-Abdin and Bertil Svensson, “An Evaluation of High-Performance Embedded Processing on MPPAs”, Proceedings of the 21st IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM’13), April 2013.&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;−&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&lt;del class=&quot;diffchange diffchange-inline&quot;&gt;[20] &lt;/del&gt;Zain-ul-Abdin, Anders Åhlander, and Bertil Svensson, “Energy Efficient Synthetic-&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;+&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&lt;ins class=&quot;diffchange diffchange-inline&quot;&gt;# &lt;/ins&gt;Ashraful Alam, Zain-ul-Abdin, and Bertil Svensson, “Parallelization of the Estimation Algorithm of the 3D Structure Tensor”, Proceedings of International Conference on Reconfigurable Computing and FPGAs (ReConFig’12), December 2012.&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;−&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;Aperture Radar Processing on a Manycore Architecture”, in Proceedings of 42nd&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;+&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&lt;ins class=&quot;diffchange diffchange-inline&quot;&gt;# &lt;/ins&gt;Zain-ul-Abdin and Bertil Svensson, “Synthetic-Aperture Radar Processing on a Manycore Architecture”, 5th Swedish Workshop on Multi-Core Computing (MCC’12), November 2012.&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;−&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;International Conference on Parallel Processing (ICPP), Lyon, France, October&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;+&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&lt;ins class=&quot;diffchange diffchange-inline&quot;&gt;# &lt;/ins&gt;Zain-ul-Abdin, Essayas Gebrewahid, and Bertil Svensson, “Managing Dynamic Reconfiguration for Fault-tolerance on a Manycore Architecture”, Proceedings of 19th International Reconfigurable Architectures Workshop (RAW’12) in conjunction&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;−&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;2013.&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;+&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;with International Parallel and Distributed Processing Symposium (IPDPS’12), May 2012.&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;−&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&lt;del class=&quot;diffchange diffchange-inline&quot;&gt;[21] &lt;/del&gt;Zain-ul-Abdin and Bertil Svensson, “An Evaluation of High-Performance Embedded&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;+&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&lt;ins class=&quot;diffchange diffchange-inline&quot;&gt;# &lt;/ins&gt;Zain-ul-Abdin, Anders Åhlander, and Bertil Svensson, “Programming Real-time Autofocus on a Massively Parallel Reconfigurable Architecture using Occam-pi”, in Proceedings of the 19th Annual IEEE International Symposium on Field- Programmable Custom Computing Machines (FCCM’11), May 2011.&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;−&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;Processing on MPPAs”, Proceedings of the 21st IEEE International Symposium on&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;+&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&lt;ins class=&quot;diffchange diffchange-inline&quot;&gt;# &lt;/ins&gt;Zain-ul-Abdin and Bertil Svensson, “Occam-pi as a High-level language for Coarse- Grained Reconfigurable Architectures”, in Proceedings of 18th International Reconfigurable Architectures Workshop (RAW’11) in conjunction with International Parallel and Distributed Processing Symposium (IPDPS’11), May 2011. &amp;#160;&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;−&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;Field-Programmable Custom Computing Machines (FCCM’13), April 2013.&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;+&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&lt;ins class=&quot;diffchange diffchange-inline&quot;&gt;# &lt;/ins&gt;Fahad Islam Cheema, Zain-ul-Abdin, and Bertil Svensson, “A Design Methodology for Resource to Performance Tradeoff Adjustment in FPGAs”, in Proceedings of the FPGA World Conference, September 2010.&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;−&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&lt;del class=&quot;diffchange diffchange-inline&quot;&gt;[22] &lt;/del&gt;Ashraful Alam, Zain-ul-Abdin, and Bertil Svensson, “Parallelization of the&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;+&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&lt;ins class=&quot;diffchange diffchange-inline&quot;&gt;# &lt;/ins&gt;Zain-ul-Abdin and Bertil Svensson, “Specifying run-time reconfiguration in Processor Arrays using high-level language”, 4th HiPEAC Workshop on Reconfigurable Computing, January 2010.&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;−&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;Estimation Algorithm of the 3D Structure Tensor”, Proceedings of International&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;+&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&lt;ins class=&quot;diffchange diffchange-inline&quot;&gt;# &lt;/ins&gt;Zain-ul-Abdin, “High-Level programming of Coarse-Grained Reconfigurable Architectures.” Proceedings of 19th International Conference on Field Programmable Logic and Applications (FPL), September 2009. (Awarded Best paper prize in the PhD Forum)&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;−&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;Conference on Reconfigurable Computing and FPGAs (ReConFig’12), December&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;+&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&lt;ins class=&quot;diffchange diffchange-inline&quot;&gt;# &lt;/ins&gt;Zain-ul-Abdin and Bertil Svensson, “Using a CSP Based Programming Model for Reconfigurable Processor Arrays” in Proceedings of International Conference on Reconfigurable Computing and FPGAs (ReConFig’08), December 2008.&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;−&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;2012.&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;+&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&lt;ins class=&quot;diffchange diffchange-inline&quot;&gt;# &lt;/ins&gt;Zain-ul-Abdin and Bertil Svensson, “A Study of Design Efficiency with a High- Level Language for FPGAs” in Proceedings of 14th International Reconfigurable Architectures Workshop (RAW’07) in conjunction with International Parallel and Distributed Processing Symposium (IPDPS’07), March 2007.&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;−&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&lt;del class=&quot;diffchange diffchange-inline&quot;&gt;[23] &lt;/del&gt;Zain-ul-Abdin and Bertil Svensson, “Synthetic-Aperture Radar Processing on a&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;+&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&lt;ins class=&quot;diffchange diffchange-inline&quot;&gt;# &lt;/ins&gt;Zain-ul-Abdin and Bertil Svensson, “Compiling Stream-Language Applications to a Reconfigurable Array Processor”, in Proceedings of International Conference of Engineering Reconfigurable Systems and Algorithms (ERSA’05), June 2005.&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;−&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;Manycore Architecture”, 5th Swedish Workshop on Multi-Core Computing&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;+&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;−&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;(MCC’12), November 2012.&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;+&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;−&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&lt;del class=&quot;diffchange diffchange-inline&quot;&gt;[24] &lt;/del&gt;Zain-ul-Abdin, Essayas Gebrewahid, and Bertil Svensson, “Managing Dynamic&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;+&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;−&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;Reconfiguration for Fault-tolerance on a Manycore Architecture”, Proceedings of&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;+&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;−&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;19th International Reconfigurable Architectures Workshop (RAW’12) in conjunction&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;+&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;−&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;with International Parallel and Distributed Processing Symposium (IPDPS’12), May&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;+&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;−&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;2012.&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;+&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;−&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&lt;del class=&quot;diffchange diffchange-inline&quot;&gt;Zain Ul-Abdin&lt;/del&gt;&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;+&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;−&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&lt;del class=&quot;diffchange diffchange-inline&quot;&gt;9&lt;/del&gt;&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;+&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;−&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&lt;del class=&quot;diffchange diffchange-inline&quot;&gt;[25] &lt;/del&gt;Zain-ul-Abdin, Anders Åhlander, and Bertil Svensson, “Programming Real-time&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;+&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;−&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;Autofocus on a Massively Parallel Reconfigurable Architecture using Occam-pi”, in&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;+&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;−&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;Proceedings of the 19th Annual IEEE International Symposium on Field-&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;+&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;−&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;Programmable Custom Computing Machines (FCCM’11), May 2011.&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;+&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;−&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&lt;del class=&quot;diffchange diffchange-inline&quot;&gt;[26] &lt;/del&gt;Zain-ul-Abdin and Bertil Svensson, “Occam-pi as a High-level language for Coarse-&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;+&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;−&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;Grained Reconfigurable Architectures”, in Proceedings of 18th International&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;+&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;−&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;Reconfigurable Architectures Workshop (RAW’11) in conjunction with International&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;+&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;−&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;Parallel and Distributed Processing Symposium (IPDPS’11), May 2011.&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;+&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;−&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&lt;del class=&quot;diffchange diffchange-inline&quot;&gt;[27] &lt;/del&gt;Fahad Islam Cheema, Zain-ul-Abdin, and Bertil Svensson, “A Design Methodology&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;+&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;−&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;for Resource to Performance Tradeoff Adjustment in FPGAs”, in Proceedings of the&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;+&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;−&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;FPGA World Conference, September 2010.&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;+&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;−&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&lt;del class=&quot;diffchange diffchange-inline&quot;&gt;[28] &lt;/del&gt;Zain-ul-Abdin and Bertil Svensson, “Specifying run-time reconfiguration in&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;+&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;−&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;Processor Arrays using high-level language”, 4th HiPEAC Workshop on&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;+&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;−&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;Reconfigurable Computing, January 2010.&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;+&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;−&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&lt;del class=&quot;diffchange diffchange-inline&quot;&gt;[29] &lt;/del&gt;Zain-ul-Abdin, “High-Level programming of Coarse-Grained Reconfigurable&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;+&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;−&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;Architectures.” Proceedings of 19th International Conference on Field&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;+&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;−&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;Programmable Logic and Applications (FPL), September 2009. (Awarded Best&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;+&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;−&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;paper prize in the PhD Forum)&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;+&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;−&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&lt;del class=&quot;diffchange diffchange-inline&quot;&gt;[30] &lt;/del&gt;Zain-ul-Abdin and Bertil Svensson, “Using a CSP Based Programming Model for&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;+&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;−&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;Reconfigurable Processor Arrays” in Proceedings of International Conference on&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;+&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;−&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;Reconfigurable Computing and FPGAs (ReConFig’08), December 2008.&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;+&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;−&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&lt;del class=&quot;diffchange diffchange-inline&quot;&gt;[31] &lt;/del&gt;Zain-ul-Abdin and Bertil Svensson, “A Study of Design Efficiency with a High-&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;+&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;−&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;Level Language for FPGAs” in Proceedings of 14th International Reconfigurable&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;+&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;−&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;Architectures Workshop (RAW’07) in conjunction with International Parallel and&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;+&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;−&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;Distributed Processing Symposium (IPDPS’07), March 2007.&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;+&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;−&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&lt;del class=&quot;diffchange diffchange-inline&quot;&gt;[32] &lt;/del&gt;Zain-ul-Abdin and Bertil Svensson, “Compiling Stream-Language Applications to a&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;+&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;−&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;Reconfigurable Array Processor”, in Proceedings of International Conference of&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;+&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;−&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;Engineering Reconfigurable Systems and Algorithms (ERSA’05), June 2005.&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;+&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;/table&gt;</summary>
		<author><name>Ceres</name></author>	</entry>

	<entry>
		<id>https://wiki.hh.se/ceres/index.php?title=Zain%27s_Publications&amp;diff=6660&amp;oldid=prev</id>
		<title>Ceres: Created page with &quot;All publications are listed in reverse chronological order per section. The material available on this page is presented to ensure timely dissemination of scholarly and techni...&quot;</title>
		<link rel="alternate" type="text/html" href="https://wiki.hh.se/ceres/index.php?title=Zain%27s_Publications&amp;diff=6660&amp;oldid=prev"/>
				<updated>2017-05-09T11:47:37Z</updated>
		
		<summary type="html">&lt;p&gt;Created page with &amp;quot;All publications are listed in reverse chronological order per section. The material available on this page is presented to ensure timely dissemination of scholarly and techni...&amp;quot;&lt;/p&gt;
&lt;p&gt;&lt;b&gt;New page&lt;/b&gt;&lt;/p&gt;&lt;div&gt;All publications are listed in reverse chronological order per section. The material available on this page is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by the author(s) and/or the copyright holder(s). &lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
== Journal Articles ==&lt;br /&gt;
&lt;br /&gt;
# Zain Ul-Abdin and Mingkun Yang, “A Radar Signal Processing Case Study for Dataflow Programming of Manycores”, Journal of Signal Processing, Vol. 87(1) April 2017, pp. 49-62. http://dx.doi.org/10.1007/s11265-015-1078-1&lt;br /&gt;
# Zain Ul-Abdin and Bertil Svensson, “A Retargetable Compilation Framework for Heterogeneous Reconfigurable Computing”, ACM Transactions on Reconfigurable Technology and Systems, Vol. 9(4), September 2016.&lt;br /&gt;
# Zain-ul-Abdin and Bertil Svensson, “Occam-pi for Programming of Massively Parallel Reconfigurable Architectures”, International Journal of Reconfigurable Computing, Vol. 2012, Article ID 504815, 2012.&lt;br /&gt;
# Zain-ul-Abdin and Bertil Svensson, “Evolution in Architectures and Programming Methodologies of Coarse-Grained Reconfigurable Computing”, Microprocessors and Microsystems, Vol. 33(3), 2009, pp. 161-178.&lt;br /&gt;
# Zain-ul-Abdin, Rehan Ahmad, and Habibullah Jamal, “In Circuit Emulator for 8031 Microcontroller”, Technical Journal of the University of Engineering and Technology, Taxila, Pakistan, 2001, pp. 1-8.&lt;br /&gt;
&lt;br /&gt;
== Conference and Workshop Papers ==&lt;br /&gt;
&lt;br /&gt;
# Sebastian Raase, Süleyman Savas, Zain Ul-Abdin and Tomas Nordstrom, “Supporting efficient channel-based communication in a mesh network-on-chip”, Ninth Nordic Workshop on Multi-Core Computing (MCC2016), Trondheim, Norway, 29-30 November, 2016.&lt;br /&gt;
# Suuleyman Savas, Sebastian Raase, Essayas Gebrewahid, Zain Ul-Abdin, Tomas Nordström, “Dataflow Implementation of QR Decomposition on a Manycore”, in Proceedings of the Third ACM International Workshop on Many-core Embedded Systems, June 2016.&lt;br /&gt;
# Essayas Gebrewahid, Mehmet Ali Arslan, Andreas Karlsson, Zain Ul-Abdin, “Support for Data Parallelsim in CAL Actor Language”, in Proceedings of the 3rd Workshop on Programming Models for SIMD/Vector Processing, Barcelona, Spain, March, 2016.&lt;br /&gt;
# Benard Xypolitidis, Rudin Shabani, Satej V. Khandeparkar, Zain Ul-Abdin, Suleyman Savas, Tomas Nordström, “Towards Architectural Design Space Exploration for Heterogeneous Manycores”, in Proceedings of the 24th Euromicro International Conference on Parallel, Distributed, and Network-Based Processing, Crete, Greece, February 17-19, 2016.&lt;br /&gt;
# Zain Ul-Abdin and Bertil Svensson, “Towards Teaching Embedded Parallel Computing: An Analytical Approach”, in Proceedings of the 18th Workshop on Computer Architecture Education (WCAE), Portland, Oregon, USA, June 13, 2015.&lt;br /&gt;
# Zain Ul-Abdin, Mingkun Yang, “Dataflow Programming of Real-time Radar Signal Processing on Manycores”, in Proceedings of the IEEE Global Conference on Signal and Information Processing (GlobalSIP), Atlanta, Georgia, USA, December 3-5, 2014.&lt;br /&gt;
# Andreas Olofsson, Tomas Nordström, Zain Ul-Abdin, “Kickstarting High performance Energy-efficient Manycore Architectures with Epiphany”, in Proceedings of 48th Asilomar Conference on Signals, Systems, and Computers, CA, USA, November 2014.&lt;br /&gt;
# Bertil Svensson, Zain Ul-Abdin, Per M Ericsson, Anders Åhlander, Hoai Hoang Bengtsson, Jerker Bengtsson, Veronica Gaspes, Tomas Nordström, “A running leap for embedded signal processing to future parallel platforms”, in Proceedings of the 2014 International Workshop on Long-term Industrial Collaboration on Software Engineering, Västerås, Sweden, September 15-19, 2014.&lt;br /&gt;
# Essayas Gebrewahid, Mingkun Yang, Gustav Cedersjö, Zain Ul-Abdin, Veronica Gaspes, Jörn W Janneck, Bertil Svensson, “Realizing Efficient Execution of Dataflow Actors on Manycores”, in Proceedings of the 12th IEEE International Conference on Embedded and Ubiquitous Computing (EUC), Milan, Italy, August 26-28, 2014.&lt;br /&gt;
# Suleyman Savas, Essayas Gebrewahid, Zain Ul-Abdin, Tomas Nordstrom, Mingkun Yang, “An evaluation of code generation of dataflow languages on manycore architectures”, in Proceedings of the 20th International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA), Chongqing, China, August 20-22, 2014.&lt;br /&gt;
# Mingkun Yang, Süleyman Savas, Zain Ul-Abdin, and Tomas Nordström, “A Communication Library for Mapping Dataflow Applications on Manycore Architectures”, 6th Swedish Workshop on Multi-Core Computing (MCC’13), November 2013.&lt;br /&gt;
[19] Zain-ul-Abdin, Anders Åhlander, and Bertil Svensson, “Real-time Radar Signal&lt;br /&gt;
Processing on Massively Parallel Processor Arrays.” in Proceedings of 47th Asilomar&lt;br /&gt;
Conference on Signals, Systems, and Computers, CA, USA, November 2013.&lt;br /&gt;
[20] Zain-ul-Abdin, Anders Åhlander, and Bertil Svensson, “Energy Efficient Synthetic-&lt;br /&gt;
Aperture Radar Processing on a Manycore Architecture”, in Proceedings of 42nd&lt;br /&gt;
International Conference on Parallel Processing (ICPP), Lyon, France, October&lt;br /&gt;
2013.&lt;br /&gt;
[21] Zain-ul-Abdin and Bertil Svensson, “An Evaluation of High-Performance Embedded&lt;br /&gt;
Processing on MPPAs”, Proceedings of the 21st IEEE International Symposium on&lt;br /&gt;
Field-Programmable Custom Computing Machines (FCCM’13), April 2013.&lt;br /&gt;
[22] Ashraful Alam, Zain-ul-Abdin, and Bertil Svensson, “Parallelization of the&lt;br /&gt;
Estimation Algorithm of the 3D Structure Tensor”, Proceedings of International&lt;br /&gt;
Conference on Reconfigurable Computing and FPGAs (ReConFig’12), December&lt;br /&gt;
2012.&lt;br /&gt;
[23] Zain-ul-Abdin and Bertil Svensson, “Synthetic-Aperture Radar Processing on a&lt;br /&gt;
Manycore Architecture”, 5th Swedish Workshop on Multi-Core Computing&lt;br /&gt;
(MCC’12), November 2012.&lt;br /&gt;
[24] Zain-ul-Abdin, Essayas Gebrewahid, and Bertil Svensson, “Managing Dynamic&lt;br /&gt;
Reconfiguration for Fault-tolerance on a Manycore Architecture”, Proceedings of&lt;br /&gt;
19th International Reconfigurable Architectures Workshop (RAW’12) in conjunction&lt;br /&gt;
with International Parallel and Distributed Processing Symposium (IPDPS’12), May&lt;br /&gt;
2012.&lt;br /&gt;
Zain Ul-Abdin&lt;br /&gt;
9&lt;br /&gt;
[25] Zain-ul-Abdin, Anders Åhlander, and Bertil Svensson, “Programming Real-time&lt;br /&gt;
Autofocus on a Massively Parallel Reconfigurable Architecture using Occam-pi”, in&lt;br /&gt;
Proceedings of the 19th Annual IEEE International Symposium on Field-&lt;br /&gt;
Programmable Custom Computing Machines (FCCM’11), May 2011.&lt;br /&gt;
[26] Zain-ul-Abdin and Bertil Svensson, “Occam-pi as a High-level language for Coarse-&lt;br /&gt;
Grained Reconfigurable Architectures”, in Proceedings of 18th International&lt;br /&gt;
Reconfigurable Architectures Workshop (RAW’11) in conjunction with International&lt;br /&gt;
Parallel and Distributed Processing Symposium (IPDPS’11), May 2011.&lt;br /&gt;
[27] Fahad Islam Cheema, Zain-ul-Abdin, and Bertil Svensson, “A Design Methodology&lt;br /&gt;
for Resource to Performance Tradeoff Adjustment in FPGAs”, in Proceedings of the&lt;br /&gt;
FPGA World Conference, September 2010.&lt;br /&gt;
[28] Zain-ul-Abdin and Bertil Svensson, “Specifying run-time reconfiguration in&lt;br /&gt;
Processor Arrays using high-level language”, 4th HiPEAC Workshop on&lt;br /&gt;
Reconfigurable Computing, January 2010.&lt;br /&gt;
[29] Zain-ul-Abdin, “High-Level programming of Coarse-Grained Reconfigurable&lt;br /&gt;
Architectures.” Proceedings of 19th International Conference on Field&lt;br /&gt;
Programmable Logic and Applications (FPL), September 2009. (Awarded Best&lt;br /&gt;
paper prize in the PhD Forum)&lt;br /&gt;
[30] Zain-ul-Abdin and Bertil Svensson, “Using a CSP Based Programming Model for&lt;br /&gt;
Reconfigurable Processor Arrays” in Proceedings of International Conference on&lt;br /&gt;
Reconfigurable Computing and FPGAs (ReConFig’08), December 2008.&lt;br /&gt;
[31] Zain-ul-Abdin and Bertil Svensson, “A Study of Design Efficiency with a High-&lt;br /&gt;
Level Language for FPGAs” in Proceedings of 14th International Reconfigurable&lt;br /&gt;
Architectures Workshop (RAW’07) in conjunction with International Parallel and&lt;br /&gt;
Distributed Processing Symposium (IPDPS’07), March 2007.&lt;br /&gt;
[32] Zain-ul-Abdin and Bertil Svensson, “Compiling Stream-Language Applications to a&lt;br /&gt;
Reconfigurable Array Processor”, in Proceedings of International Conference of&lt;br /&gt;
Engineering Reconfigurable Systems and Algorithms (ERSA’05), June 2005.&lt;/div&gt;</summary>
		<author><name>Ceres</name></author>	</entry>

	</feed>