Information for "Towards Next Generation Embedded Systems: Utilizing Parallelism and Reconfigurability"
From CERES
Basic information
| Display title | Towards Next Generation Embedded Systems: Utilizing Parallelism and Reconfigurability |
| Default sort key | Towards Next Generation Embedded Systems: Utilizing Parallelism and Reconfigurability |
| Page length (in bytes) | 1,425 |
| Page ID | 4365 |
| Page content language | English (en) |
| Indexing by robots | Allowed |
| Number of views | 5,136 |
| Number of redirects to this page | 0 |
| Counted as a content page | Yes |
Page protection
| Edit | Allow all users |
| Move | Allow all users |
Edit history
| Page creator | Ceres (Talk | contribs) |
| Date of page creation | 20:56, 12 April 2016 |
| Latest editor | Ceres (Talk | contribs) |
| Date of latest edit | 14:05, 6 October 2017 |
| Total number of edits | 11 |
| Total number of distinct authors | 1 |
| Recent number of edits (within past 91 days) | 0 |
| Recent number of distinct authors | 0 |
Page properties
| Magic word (1) |
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| Transcluded templates (5) | Templates used on this page: |