Clock Glitch Attacks on Embedded IoT Devices: An FPGA-Based Exploration
| Title | Clock Glitch Attacks on Embedded IoT Devices: An FPGA-Based Exploration |
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| Summary | this thesis aims to provide a comprehensive understanding of the vulnerabilities and potential countermeasures associated with clock glitch attacks on FPGA based IoT devices |
| Keywords | IoT, Hardware Security, FPGA |
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| Author | Mahdi Fazeli |
| Supervisor | Mahdi Fazeli |
| Level | Master |
| Status | Open |
In the rapidly evolving landscape of IoT security, clock glitch attacks have emerged as a potent threat to embedded systems. This research delves into the intricacies of clock glitching, a specific type of fault injection technique that manipulates the timing mechanisms of a system to induce unintended behaviors. By focusing on FPGA-based IoT devices, this thesis aims to comprehensively understand the vulnerabilities and potential countermeasures associated with clock glitch attacks. Through a series of experiments and analyses, we will evaluate the susceptibility of FPGA-based IoT devices to these attacks, explore the underlying mechanisms that make these attacks possible, and propose robust defense strategies to mitigate their impact. This work seeks to bridge the gap between theoretical knowledge and practical application, offering valuable insights for researchers and practitioners in IoT security.
Deliverables:
1. Literature Review: A comprehensive review of existing research on clock glitch attacks, their methodologies, and their impact on embedded IoT devices. This should include a categorization of proposed clock and voltage glitch generators.
2. Experimental Testbed: Design and development of an FPGA-based practical testbed for characterizing exploitable clock glitch faults.
3. Attack Scenarios: Detailed descriptions and demonstrations of various clock glitch attack scenarios on embedded IoT devices, informed by vulnerability analysis.
4. Countermeasure Evaluation: An assessment of existing countermeasures against clock glitch attacks, exploring design trade-offs like signal-to-noise ratio, number of power traces, and clock glitch width.
5. Proposed Solutions: Introduction and evaluation of novel techniques or improvements to existing methods to mitigate the effects of clock glitch attacks on FPGA-based IoT devices.
