Publications:Multi-Stage Programming for High-Level Description of Circuit Families
From CERES
| Title | Multi-Stage Programming for High-Level Description of Circuit Families |
|---|---|
| Author | Fulong Chen and Walid Taha and Lei Deng |
| Year | 2010 |
| PublicationType | Conference Paper |
| Journal | |
| HostPublication | CISP 2010 : 2010 3rd International Congress on Image and Signal Processing, 16-18 October 2010, Yantai, China |
| DOI | http://dx.doi.org/10.1109/CISP.2010.5647521 |
| Conference | 3rd International Congress on Image and Signal Processing (CISP), 16-18 October 2010, Yantai, China |
| Diva url | http://hh.diva-portal.org/smash/record.jsf?searchId=1&pid=diva2:396127 |
| Abstract | Hardware description languages use a low level of abstraction making the task of hardware designers error-prone and time consuming. The resulting descriptions tend to be lengthy and hard to reason about. This paper presents a minimal functional language for describing hardware circuits. Using multistage programming concepts, Fast Fourier Transform circuit descriptions can be generated in this language from a higher level generic description. It bridges the gap between the generated code and the required low-level hardware description by presenting the translator to automatically convert the generated code into Verilog, a streamline hardware description language. |
