WG211/M11Scholz
Effective Parallel Code Generation Through Auto-Sequentialisation by Sven-Bodo Scholz
Creating parallel programs that make effective use of a range of parallel architectures is hard. Even when a given algorithm offers a lot of potential parallelism it is a challenge to identify which of these options for parallelisation are the most suitable ones for a given target architecture. In fact, it turns out that these choices are architecture dependent.
Aiming for programmer productivity in a world of changing hardware options we argue in favour of a generative approach: We suggest to start out from rather abstract program specifications that expose as much potential parallelism as possible. Such specification then can be used as input for a program generator that produces parallel codes optimised for the particular needs of a given hardware architecture.
In this talk, we briefly present the various challenges we have met when generating parallel programs from the functional, data-parallel programming language SaC. In particular we highlight the differences in our observations when looking at a range of architectures as targets: SMPs, GPUs, and experimental manycore architectures. We close with a first look at the challenges when looking at FPGAs as accelerators.